1. Field of Invention
The present invention provides a method for manufacturing an electroconductive material-filled throughhole substrate and more particularly to a method for manufacturing an electroconductive material-filled throughhole substrate which is advantageous in that high-density wiring boards such as multilayer wiring boards for mounting semiconductor chips can be formed.
2. Background Art
In recent years, an advance of an enhancement in performance, a size reduction and a weight reduction of electronic equipment has led to a demand for a size reduction, multipin design, and fine pitches of external terminals in semiconductor packages. Accordingly, there is an ever-increasing demand for higher-density wiring boards. To meet this demand, mounting of LSIs directly on printing wiring boards or mounting of CSPs (chip size packages) and BGAs (ball grid arrays) on printed wiring boards has become adopted. Regarding printed wiring boards as well, to cope with a demand for higher density, multilayer wiring boards manufactured by a buildup method, in which wiring and via are built up one layer by one layer onto a core substrate through an electrical insulating layer to form a multilayer structure, have become used.
In conventional buildup multilayer wiring boards, an electroconductive material-filled throughhole substrate formed by drilling throughholes in an insulating substrate and plating the inner side of the throughholes with a metal, and filling a resin or an electroconductive paste into the throughholes has been used (Japanese Patent Laid-Open No. 130050/1997). In this electroconductive material-filled throughhole substrate, the front and back sides are electrically conducted to each other through the throughholes, and wiring is built up through an electrical insulating layer onto this electroconductive material-filled throughhole substrate to form a multilayer structure and thus to form a multilayer wiring board. Further, in recent years, a multilayer wiring board having a laminated structure has been developed. This multilayer wiring board has been formed by subjecting resin-filled throughholes to lid plating to form a plating layer so as to clog the opening part in the throughholes, disposing vias immediately above the lid plated parts, and further disposing vias on the vias (Japanese Patent Laid-Open No. 23251/2003).